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The ispClock5400D family integrates a CleanClock PLL and a FlexiClock Output block. The CleanClock PLL provides an ultra-low-jitter clock source to a set of four V-dividers. The FlexiClock output block receives the clock output from these V-dividers through an output switch matrix and distributes them to the output pin using a programmable logic interface. T.
CleanClock™ PLL
Ultra Low Period Jitter 2.5ps
Ultra Low Phase Jitter 6.5ps
Fully Integrated High-Performance PLL
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• Programmable lock detect Four output dividers Programmable on-chip loop filter Compatible with Spread Spectrum clocks Internal/external feedback
Up to 10 Programmable Fan-out Buffers
• Programmable differential output standards and individual enable controls - LVDS, LVPECL, HSTL, SSTL, HCSL, MLVDS
• Up to 10 banks with individual VCCO and GND - 1.5V, 1.8V, 2.5V, 3.3V
All I/Os are Hot Socket Compliant
Operating Modes
• Fan-out buffer with programmable output .
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | ispClock5406D |
Lattice Semiconductor |
Zero Delay And Fan-Out Buffer |
|
| 2 | ispClock5410D |
Lattice Semiconductor |
Zero Delay And Fan-Out Buffer |
|
| 3 | ISPCLOCK5300S |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 4 | ISPCLOCK5304S |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 5 | ISPCLOCK5308S |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 6 | ISPCLOCK5312S |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 7 | ISPCLOCK5316S |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 8 | ISPCLOCK5320S |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 9 | ISPCLOCK5500 |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 10 | ISPCLOCK5510 |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 11 | ISPCLOCK5520 |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 12 | ISPCLOCK5600 |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
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