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The ispClock5300S is an in-system-programmable zero delay universal fan-out buffer for use in clock distribution applications. The ispClock5312S, the first member of the ispClock5300S family, provides up to 12 single-ended ultra low skew outputs. Each pair of outputs may be independently configured to support separate I/O standards (LVTTL, LVCMOS -3.3V, 2.5V, .
■ Four Operating Configurations
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• Zero delay buffer Zero delay and non-zero delay buffer Dual non-zero delay buffer Non-zero delay buffer with output divider
• Up to +/- 5ns skew range
• Coarse and fine adjustment modes
■ Up to Three Clock Frequency Domains
■ Flexible Clock Reference and External Feedback Inputs
• Programmable single-ended or differential input reference standards - LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, Differential HSTL, Differential SSTL
• Clock A/B selection multiplexer
• Programmable Feedback Standards - LVTTL, LVCMOS, SSTL, HSTL
• Programmable termination
■ 8MHz.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | ISPCLOCK5312S |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 2 | ISPCLOCK5300S |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 3 | ISPCLOCK5304S |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 4 | ISPCLOCK5308S |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 5 | ISPCLOCK5320S |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 6 | ispClock5400D |
Lattice Semiconductor |
Zero Delay And Fan-Out Buffer |
|
| 7 | ispClock5406D |
Lattice Semiconductor |
Zero Delay And Fan-Out Buffer |
|
| 8 | ispClock5410D |
Lattice Semiconductor |
Zero Delay And Fan-Out Buffer |
|
| 9 | ISPCLOCK5500 |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 10 | ISPCLOCK5510 |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 11 | ISPCLOCK5520 |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|
| 12 | ISPCLOCK5600 |
Lattice Semiconductor |
In-System Programmable Zero-Delay |
|