Y27US08121M - Hynix Semiconductor

Y27US08121M HY27US08121M

of Device Operations - /CE Don’t Care Enabled(Disabled) -> Sequential Row Read Disabled (Enabled) (Page22) 3) Add the description of System Interface Using CE don’t care (Page37) 1) Delete Errata 2) Change Characteristics (3V Product) 0.5 tCRY Before After 60 + tr 70 + tr tREA@ID Read 35 45 Jun. 01. 2004 Preliminary 3) Delete Cache Program 0.6 1) Change TSO.

Features

SUMMARY HIGH DENSITY NAND FLASH MEMORIES - Cost effective solutions for mass storage applications FAST BLOCK ERASE - Block erase time: 2ms (Typ) NAND INTERFACE - x8 or x16 bus width. - Multiplexed Address/ Data www.DataSheet4U.com - Pinout compatibility for all densities STATUS REGISTER ELECTRONIC SIGNATURE SUPPLY VOLTAGE Sequential Row Read OPTION : HY27USXX121M - 3.3V device: VCC = 2.7 to 3.6V - 1.8V device: VCC = 1.7 to 1.95V : HY27SSXX121M AUTOMATIC PAGE 0 READ AT POWER-UP OPTION - Boot from NAND support - Automatic Memory Download Memory Cell Array - 528Mbit = 528 Bytes x 32 Page.