W8NB90 - ST Microelectronics

W8NB90 STW8NB90

Using the latest high voltage MESH OVERLAY ™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprieraty edge termination structure, gives the lowest R DS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate cha.

Features

er Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature ISOWATT218 INTERNAL SCHEMATIC DIAGRAM Value STW8NB90 900 900 ±30 8 5 32 200 1.6 4
  –65 to 150 150 2500 5 3 20 80 0.64 STH8NB90FI Unit V V V A A A W W/°C V/ns V °C °C (
•)Pulse width limited by safe operating area (1)ISD ≤8 A, di/dt ≤200.