UPD30500A - NEC

UPD30500A 64-BIT MICROPROCESSOR

The µPD30500 (VR5000), µPD30500A (VR5000A), and µPD30500BNote (VR5000B) are a high-performance, 64bit RISC (Reduced Instruction Set Computer) type microprocessors employing the RISC architecture developed by MIPSTM Technologies Inc. The instructions of the VR5000, VR5000A, and VR5000B are compatible with those of the VR3000TM Series and VR4000TM Series and h.

Features

• Employs 64-bit MIPS-based RISC architecture
• High-speed processing
• 2-way super scalar 5-stage pipeline
• 5.5 SPECint95, 5.5 SPECfp95, 278 MIPS (µPD30500) 6.6 SPECint95, 6.6 SPECfp95, 353 MIPS (µPD30500A) 8 SPECint95, 8 SPECfp95, 423 MIPS (µPD30500B)
• High-speed translation buffer mechanism (TLB) (48 entries)
• Address space Physical: 36 bits, Virtual: 40 bits
• Floating-point unit (FPU)
• Sum-of-products operation instruction supported
• Primary cache memory (instruction/data: 32 Kbytes each)
• Secondary cache controller
• Maximum operating frequency Internal: 200 MHz (µPD30500), 250 MHz.