TPIC6596 - Texas Instruments

TPIC6596 POWER LOGIC 8-BIT SHIFT LATCH

DW OR N PACKAGE (TOP VIEW) PGND 1 VCC 2 SER IN 3 DRAIN0 4 DRAIN1 5 DRAIN2 6 DRAIN3 7 SRCLR 8 G9 PGND 10 20 PGND 19 LGND 18 SER OUT 17 DRAIN7 16 DRAIN6 15 DRAIN5 14 DRAIN4 13 SRCK 12 RCK 11 PGND The TPIC6596 is a monolithic, high-voltage, highcurrent power 8-bit shift register designed for use logic symbol† in systems that require relatively high load p.

Features

R C1 This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK) respectively. The storage register transfers data to the output buffer when shift-register clear (SRCLR) is high. When SRCLR is low, all registers in the device are cleared. When output enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. SER IN 3 1D 4 2 DRAIN0 5 DRAIN1 6 DRAIN2 7 D.