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TPD1024S - Toshiba Semiconductor

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TPD1024S Silicon Monolithic Power MOS

Pin No. 1 Symbol IN Function Input pin. Input is CMOS-compatible, with pull-down resistor connected. Even if the input is open, output will not accidentally turn on. Output pin. When current in excess of the typical current (3.5 A (typ.)) flows to the output pin, the current limiter operates to protect the IC. Ground pin. 2 3 OUT GND Timing Chart 2 2002.

Features

l A monolithic power IC with a new structure combining a control block and a vertical power MOS FET (π-MOS) on a single chip. l Can directly drive a power load from a CMOS logic. l Built-in protection against overvoltage, load short circuiting, and thermal shutdown. l Low on resistance : RDS (ON) = 0.5 Ω(max), (@VIN = 5 V, Tj = 25°C) l 3-pin power-molded package usable for surface mounting. Pin Assignment Weight HSIP3-P-2.30B HSOP3-P-2.30A : 0.36 g (typ.) : 0.28 g (typ.) Note: That because of its MOS structure, this product is sensitive to static electricity. 1 2002-10-24 TPD1024S Bloc.

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