These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. SN54F573 . . . J PACKAGE SN74F573 . . . DW OR N PACKAGE (TOP VIEW) OE 1 1D 2 2D 3 3D 4 4D 5 5D 6 6D .
Q outputs follow the data (D) inputs. When the latch enable is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a highimpedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. 8D GND LE 3 2 1 20 19 3D 4 18 2Q 4D 5 17 3Q 5D 6 16 4Q 6.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | SN74F574 |
Texas Instruments |
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP | |
2 | SN74F574N |
Texas Instruments |
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP | |
3 | SN74F521 |
Texas Instruments |
8-Bit Identity Comparators | |
4 | SN74F521N |
Texas Instruments |
8-Bit Identity Comparators | |
5 | SN74F541 |
Texas Instruments |
OCTAL BUFFERS/DRIVERS | |
6 | SN74F541N |
Texas Instruments |
OCTAL BUFFERS/DRIVERS | |
7 | SN74F543 |
Texas Instruments |
OCTAL REGISTERED TRANSCEIVER | |
8 | SN74F00 |
Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NAND GATES | |
9 | SN74F02 |
Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NOR GATES | |
10 | SN74F04 |
Texas Instruments |
HEX INVERTERS | |
11 | SN74F08 |
Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-AND GATE | |
12 | SN74F10 |
Texas Instruments |
TRIPLE 3-INPUT POSITIVE-NAND GATE |