SN54LS163A - Motorola

SN54LS163A BCD DECADE COUNTERS / 4-BIT BINARY COUNTERS

The LS160A / 161A / 162A / 163A are 4-bit synchronous counters with a synchronous Parallel Enable (Load) feature. The counters consist of four edge-triggered D flip-flops with the appropriate data routing networks feeding the D inputs. All changes of the Q outputs (except due to the asynchronous Master Reset in the LS160A and LS161A) occur as a result of, an.

Features

N DIAGRAM DIP (TOP VIEW) VCC TC Q0 Q1 Q2 Q3 CET PE 16 15 14 13 12 11 10 9 1234
*R CP P0 P1 56 78 P2 P3 CEP GND NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
*MR for LS160A and LS161A
*SR for LS162A and LS163A PIN NAMES PE P0
  – P3 CEP CET CP MR SR Q0
  – Q3 TC Parallel Enable (Active LOW) Input Parallel Inputs Count Enable Parallel Input Count Enable Trickle Input Clock (Active HIGH Going Edge) Input Master Reset (Active LOW) Input Synchronous Reset (Active LOW) Input Parallel Outputs (Note b) Terminal Count Output (Note b) LOADING (Not.