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SL74HC08 Quad 2-Input AND Gate High-Performance Silicon-Gate CMOS The SL74HC08 is identical in pinout to the LS/ALS08. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current:.
ckage+ Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5 ±20 ±25 ±50 750 500 -65 to +150 260 Unit V V V mA mA mA mW °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA tr, t f Parameter DC Supply Voltage (Referenced to GND) D.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | SL74HC00 |
System Logic Semiconductor |
Quad 2-Input NAND Gate |
|
| 2 | SL74HC02 |
System Logic Semiconductor |
Quad 2-Input NOR Gate |
|
| 3 | SL74HC03 |
System Logic Semiconductor |
Quad 2-Input NAND Gate with Open-Drain Outputs |
|
| 4 | SL74HC04 |
System Logic Semiconductor |
Hex Inverter High-Performance Silicon-Gate CMOS |
|
| 5 | SL74HC05 |
System Logic Semiconductor |
Hex Inverter with Open-Drain Outputs |
|
| 6 | SL74HC10 |
System Logic Semiconductor |
Triple 3-Input NAND Gate |
|
| 7 | SL74HC109 |
System Logic Semiconductor |
Dual J-K Flip-Flop with Set and Reset |
|
| 8 | SL74HC11 |
System Logic Semiconductor |
Triple 3-Input AND Gate |
|
| 9 | SL74HC112 |
System Logic Semiconductor |
Dual J-K Flip-Flop with Set and Reset |
|
| 10 | SL74HC123 |
System Logic Semiconductor |
Dual Retriggerable Monostable Multivibrator |
|
| 11 | SL74HC125 |
System Logic Semiconductor |
Quad 3-State Noninverting Buffers |
|
| 12 | SL74HC132 |
System Logic Semiconductor |
Quad 2-Input NAND Gate |
|