SL74HC112 Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The SL74HC112 is identical in pinout to the LS/ALS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs..
ble if Set and Reset go high simultaneously X = Don’t Care
SLS
System Logic Semiconductor
SL74HC112
MAXIMUM RATINGS
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Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL
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Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5 ±20 ±25 .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | SL74HC11 |
System Logic Semiconductor |
Triple 3-Input AND Gate | |
2 | SL74HC10 |
System Logic Semiconductor |
Triple 3-Input NAND Gate | |
3 | SL74HC109 |
System Logic Semiconductor |
Dual J-K Flip-Flop with Set and Reset | |
4 | SL74HC123 |
System Logic Semiconductor |
Dual Retriggerable Monostable Multivibrator | |
5 | SL74HC125 |
System Logic Semiconductor |
Quad 3-State Noninverting Buffers | |
6 | SL74HC132 |
System Logic Semiconductor |
Quad 2-Input NAND Gate | |
7 | SL74HC138 |
System Logic Semiconductor |
1-of-8 Decoder/Demultiplexer | |
8 | SL74HC139 |
System Logic Semiconductor |
Dual 1-of-4 Decoder/Demultiplexer | |
9 | SL74HC14 |
System Logic Semiconductor |
Hex Schmitt-Trigger Inverter | |
10 | SL74HC151 |
System Logic Semiconductor |
8-Input Data Selector/Multiplexer | |
11 | SL74HC153 |
System Logic Semiconductor |
Dual 4-Input Data Selector/Multiplexer | |
12 | SL74HC154 |
System Logic Semiconductor |
1- of-16 Decoder/Demultiplexer |