SJA1000 - NXP

SJA1000 Stand-alone CAN controller

ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Description of the CAN controller blocks Interface Management Logic (IML) Transmit Buffer (TXB) Receive Buffer (RXB, RXFIFO) Acceptance Filter (ACF) Bit Stream Processor (BSP) Bit Timing Logic (BTL) Error Management Logic (EML) Detailed description of the CAN controller PCA82C200 compatibility.

Features

GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Description of the CAN controller blocks Interface Management Logic (IML) Transmit Buffer (TXB) Receive Buffer (RXB, RXFIFO) Acceptance Filter (ACF) Bit Stream Processor (BSP) Bit Timing Logic (BTL) Error Management Logic (EML) Detailed description of the CAN controller PCA82C200 compatibility Differences between BasicCAN and PeliCAN mode BasicCAN mode BasicCAN address layout Reset values Control Register (CR) Command Register (CMR) Status Register (SR) Interrupt Register (IR) Transmit buffer layout Receive b.