The Si5326 is a jitter-attenuating precision clock multiplier for applications requiring sub 1 ps jitter performance. The Si5326 accepts two input clocks ranging from 2 kHz to 710 MHz and generates two output clocks ranging from 2 kHz to 945 MHz and select frequencies to 1.4 GHz. The two outputs are divided down separately from a common source. The Si5326 ca.
Generates any frequency from 2 kHz
Dual clock outputs with selectable
to 945 MHz and select frequencies to signal format
1.4 GHz from an input frequency of
Support for ITU G.709 and custom
2 kHz to 710 MHz
FEC ratios (255/238, 255/237,
Ultra-low jitter clock outputs with jitter 255/236)
generation as low as 0.3 ps rms
LOL, LOS, FOS alarm outputs
(50 kHz
–80 MHz)
Digitally-controlled output phase
Integrated loop filter with selectable adjustment
loop bandwidth (60 Hz to 8.4 kHz)
I2C or SPI programmable
Meets OC-192 GR-253-CORE jitter
On-chip voltage regulator for
.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | SI532 |
Silicon Laboratories |
DUAL FREQUENCY CRYSTAL OSCILLATOR | |
2 | SI5320 |
Silicon Laboratories |
SONET/SDH PRECISION CLOCK MULTIPLIER IC | |
3 | Si53204 |
Skyworks |
Low Power Gen 1 to Gen 6 Clock Buffer | |
4 | Si53204 |
Silicon Laboratories |
Low Power Gen 1/2/3/4/5 Clock Buffer | |
5 | Si53208 |
Skyworks |
Low Power Gen 1 to Gen 6 Clock Buffer | |
6 | Si53208 |
Silicon Laboratories |
Low Power Gen 1/2/3/4/5 Clock Buffer | |
7 | Si5321 |
Silicon Laboratories |
SONET/SDH PRECISION CLOCK MULTIPLIER IC | |
8 | Si53212 |
Skyworks |
Low Power Gen 1 to Gen 6 Clock Buffer | |
9 | Si53212 |
Silicon Laboratories |
Low Power Gen 1/2/3/4/5 Clock Buffer | |
10 | Si5322 |
Silicon Labs |
PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER | |
11 | Si5323 |
Silicon Laboratories |
PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR | |
12 | Si5324 |
Silicon Laboratories |
ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR |