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Si5322 PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER Features Not recommended for new Dual clock outputs with designs. For alternatives, see the selectable signal format: Si533x family of products. LVPECL, LVDS, CML, CMOS Selectable output frequencies Support for ITU G.709 FEC ratios ranging from 19.44 to 1050 MHz (255/238, 255/237, 255/236) .
Not recommended for new
Dual clock outputs with
designs. For alternatives, see the selectable signal format:
Si533x family of products.
LVPECL, LVDS, CML, CMOS
Selectable output frequencies
Support for ITU G.709 FEC ratios ranging from 19.44 to 1050 MHz (255/238, 255/237, 255/236)
Low jitter clock outputs with jitter
LOS alarm output
generation as low as 0.6 psRMS
Pin-programmable settings
(50 kHz
–80 MHz)
On-chip voltage regulator for
Integrated loop filter with
1.8 V ±5%, 2.5 or 3.3 V ±10%
selectable loop bandwidth
operation
(150 kHz to 1.3 MHz)
Small size:.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | SI532 |
Silicon Laboratories |
DUAL FREQUENCY CRYSTAL OSCILLATOR |
|
| 2 | SI5320 |
Silicon Laboratories |
SONET/SDH PRECISION CLOCK MULTIPLIER IC |
|
| 3 | Si53204 |
Skyworks |
Low Power Gen 1 to Gen 6 Clock Buffer |
|
| 4 | Si53204 |
Silicon Laboratories |
Low Power Gen 1/2/3/4/5 Clock Buffer |
|
| 5 | Si53208 |
Skyworks |
Low Power Gen 1 to Gen 6 Clock Buffer |
|
| 6 | Si53208 |
Silicon Laboratories |
Low Power Gen 1/2/3/4/5 Clock Buffer |
|
| 7 | Si5321 |
Silicon Laboratories |
SONET/SDH PRECISION CLOCK MULTIPLIER IC |
|
| 8 | Si53212 |
Skyworks |
Low Power Gen 1 to Gen 6 Clock Buffer |
|
| 9 | Si53212 |
Silicon Laboratories |
Low Power Gen 1/2/3/4/5 Clock Buffer |
|
| 10 | Si5323 |
Silicon Laboratories |
PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR |
|
| 11 | Si5324 |
Silicon Laboratories |
ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR |
|
| 12 | Si5325 |
Silicon Laboratories |
uP-PROGRAMMABLE PRECISION CLOCK MULTIPLIER |
|