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SAA32M8 - SpecTek

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SAA32M8 DDR2 SDRAM

. .5 Functional Description . . . . . . .10 Absolute M.

Features















• ROHS compliant VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V JEDEC standard 1.8V I/O (SSTL_18-compatible) Differential data strobe (DQS, DQS#) option Four-bit prefetch architecture DLL to align DQ and DQS transitions with CK Four internal banks for concurrent operation Programmable CAS Latency (CL): 3 and 4 Posted CAS additive latency (AL): 0, 1, 2, 3, and 4 WRITE latency = READ latency - 1 tCK Programmable burst lengths: 4 or 8 Adjustable data-output drive strength 64ms, 8,192-cycle refresh On-die termination (ODT) Options1, 2
• SpecTek Memory
• Configuration 64 Meg x 4 (.

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