The S7T3236U4M, S7T3218U4M and S7T3209U4M are 37,748,736-bits Quadruple Synchronous Pipelined Burst SRAMs. They are organized as 1,048,576 words by 36bits for S7T3236U4M, 2,097,152 words by 18bits for S7T3218U4M and 4,194,304 words by 9bits for S7T3209U4M. The Quadruple operation is possible by supporting DDR read and write operations through separate data o.
• 1.8V+0.1V/-0.1V Power Supply.
• DLL circuitry for wide output data valid window and future fre-
quency scaling.
• I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/
-0.1V for 1.8V I/O
• Separate independent read and write data ports
with concurrent read and write operation
• HSTL I/O
• Full data coherency, providing most current data .
• Synchronous pipeline read with self timed late write.
• Read latency: 2.5 clock cycles
• Registered address, control and data input/output.
• DDR(Double Data Rate) Interface on read and write ports.
• Fixed 4-bit burst for both read and write operat.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | S7T3236T4M |
NETSOL |
1Mx36 & 2Mx18 & 4Mx9 Quadruple-II+ BL4 SRAM w/ ODT | |
2 | S7T3209T4M |
NETSOL |
1Mx36 & 2Mx18 & 4Mx9 Quadruple-II+ BL4 SRAM w/ ODT | |
3 | S7T3209U4M |
NETSOL |
1Mx36 & 2Mx18 & 4Mx9 Quadruple-II+ BL4 SRAM w/ ODT | |
4 | S7T3218T4M |
NETSOL |
1Mx36 & 2Mx18 & 4Mx9 Quadruple-II+ BL4 SRAM w/ ODT | |
5 | S7T3218U4M |
NETSOL |
1Mx36 & 2Mx18 & 4Mx9 Quadruple-II+ BL4 SRAM w/ ODT | |
6 | S7T1609U4M |
NETSOL |
512Kx36 & 1Mx18 & 2Mx9 Quadruple-II+ BL4 SRAM w/ ODT | |
7 | S7T1618U4M |
NETSOL |
512Kx36 & 1Mx18 & 2Mx9 Quadruple-II+ BL4 SRAM w/ ODT | |
8 | S7T1636U4M |
NETSOL |
512Kx36 & 1Mx18 & 2Mx9 Quadruple-II+ BL4 SRAM w/ ODT | |
9 | S7T4409T2M |
NETSOL |
144Mb Quadruple-II+ BL2 w/ ODT SRAM | |
10 | S7T4418T2M |
NETSOL |
144Mb Quadruple-II+ BL2 w/ ODT SRAM | |
11 | S7T4418U4M |
NETSOL |
144Mb Quadruple-II+ BL4 w/ ODT SRAM | |
12 | S7T4436T2M |
NETSOL |
144Mb Quadruple-II+ BL2 w/ ODT SRAM |