R5F52201BDFK - Renesas

R5F52201BDFK 32-MHz 32-bit RX MCUs

Datasheet RX220 Group Renesas MCUs 32-MHz 32-bit RX MCUs, 49 DMIPS, up to 256-KB flash memory, 12-bit A/D, ELC, MPC, IrDA, RTC, up to 7 comms channels; incorporating functions for IEC60730 compliance R01DS0130EJ0110 Rev.1.10 Dec 20, 2013 Features ■ 32-bit RX CPU core  Max. operating frequency: 32 MHz  Capable of 49 DMIPS in operation at 32 MHz  Accumul.

Features

■ 32-bit RX CPU core
 Max. operating frequency: 32 MHz
 Capable of 49 DMIPS in operation at 32 MHz
 Accumulator handles 64-bit results (for a single instruction) from 32- × 32-bit operations
 Multiplication and division unit handles 32- × 32-bit operations (multiplication instructions take one CPU clock cycle)
 Fast interrupt
 CISC Harvard architecture with 5-stage pipeline
 Variable-length instructions, ultra-compact code
 On-chip debugging circuit
■ Low-power design and architecture
 Operation from a single 1.62-V to 5.5-V supply
 1.62-V operation available (at up to 8 MHz)
 Three.