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The PLS100 (3-State) and PLS101 (Open Collector) are bipolar, fuse Programmable Logic Arrays (PLAs). Each device utilizes the standard AND/OR/Invert architecture to directly implement custom sum of product equations. Each device consists of 16 dedicated inputs and 8 dedicated outputs. Each output is capable of being actively controlled by any or all of the 4.
• Field-programmable (Ni-Cr link)
• Input variables: 16
• Output functions: 8
• Product terms: 48
• I/O propagation delay: 50ns (max.)
• Power dissipation: 600mW (typ.)
• Input loading:
–100µA (max.)
• Chip Enable input
• Output option:
– PLS100: 3-State
– PLS101: Open-Collector
PIN CONFIGURATIONS
N Package
FE
* 1 I7 2 I6 3 I5 4 I4 5 I3 6 I2 7 I1 8 I0 9 F7 10 F6 11 F5 12 F4 13 GND 14 28 VCC 27 I8 26 I9 25 I10 24 I11 23 I12 22 I13 21 I14 20 I15 19 CE 18 F0 17 F1 16 F2 15 F3
• Output disable function:
– 3-State: Hi-Z
– Open-Collector: High
*
APPLICATIONS
• CRT display systems
• Code conversi.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | PLS100 |
NXP |
(PLS100 / PLS101) Programmable logic arrays |
|
| 2 | PLS103 |
Signetics |
Field Programmable Gate Array |
|
| 3 | PLS105 |
NXP |
Field-Programmable Logic Sequencer |
|
| 4 | PLS153A |
Philips |
Programmable logic arrays 18 × 42 × 10 |
|
| 5 | PLS155 |
NXP |
Programmable Logic Sequencer |
|
| 6 | PLS159A |
NXP |
Programmable logic sequencer 16 x 45 x 12 |
|
| 7 | PLS167 |
NXP |
FIELD PROGRAMMABLE LOGIC SEQUENCER |
|
| 8 | PLS167A |
NXP |
FIELD PROGRAMMABLE LOGIC SEQUENCER |
|
| 9 | PLS168 |
NXP |
FIELD PROGRAMMABLE LOGIC SEQUENCER |
|
| 10 | PLS173 |
NXP |
Programmable logic array 22 x 42 x 10 |
|
| 11 | PLS1A151MDL4 |
Nichicon |
CONDUCTIVE POLYMER ALUMINUM SOLID ELECTROLYTIC CAPACITORS |
|
| 12 | PLS1A271MDO1 |
Nichicon |
CONDUCTIVE POLYMER ALUMINUM SOLID ELECTROLYTIC CAPACITORS |
|