MTP10N10EL - Motorola

MTP10N10EL TMOS POWER FET

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTP10N10EL/D ™ Data Sheet Logic Level TMOS E-FET.™ Power Field Effect Transistor Designer's MTP10N10EL Motorola Preferred Device N–Channel Enhancement–Mode Silicon Gate This advanced TMOS power FET is designed to withstand high energy in the avalanche and commutation modes. This new energy eff.

Features

100 VOLTS RDS(on) = 0.22 OHMS ® D G S CASE 221A
  –06, Style 5 TO
  –220AB MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Drain
  –to
  –Source Voltage Drain
  –to
  –Gate Voltage (RGS = 1.0 MΩ) Gate
  –to
  –Source Voltage — Continuous — Non
  –Repetitive (tp ≤ 10 ms) Drain Current — Continuous @ TC = 25°C — Continuous @ TC = 100°C — Single Pulse (tp ≤ 10 µs) Total Power Dissipation @ TC = 25°C Derate above 25°C Total Power Dissipation @ TC = 25°C (1) Operating and Storage Temperature Range Single Pulse Drain
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  –Source Avalanche Energy — Starting TJ = 25°C (VDD = 25 Vdc, VGS = 5.0 Vdc, Peak IL = 10 Adc,.