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. .6 Functional Description . . . . . . . .9 Initializ.
• Fully synchronous; all signals registered on positive edge of system clock
• Internal pipelined operation; column address can be changed every clock cycle
• Internal banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto Precharge, includes CONCURRENT AUTO PRECHARGE and Auto Refresh Modes
• Self Refresh Mode
• 64ms, 8,192-cycle refresh
• LVTTL-compatible inputs and outputs
• Low voltage power supply
• Temperature Compensated Self Refresh (TCSR) Option Marking
• VDD/VDDQ LC 3.3V/3.3V G 3.0V/3.0V V 2.5V/2.5V-1.8V
• Configurations 16M16 16 Meg x 16 (.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | MT48LC16M16LFBG |
Micron Technology |
256M x 16 Mobile SDRAM |
|
| 2 | MT48LC16M16LFFG |
Micron Technology |
256M x 16 Mobile SDRAM |
|
| 3 | MT48LC16M16A2 |
Micron Technology |
Automotive SDR SDRAM |
|
| 4 | MT48LC16M4A2 |
Micron Technology |
SDR SDRAM |
|
| 5 | MT48LC16M8A1 |
Micron Technology |
(MT48LCxxMxxAx) SYNCHRONOUS DRAM |
|
| 6 | MT48LC16M8A2 |
Micron Technology |
4 Meg x 8 x 4 Banks SDR SDRAM |
|
| 7 | MT48LC16LFFG |
Micron Technology |
256M x 16 Mobile SDRAM |
|
| 8 | MT48LC128M4A2 |
Micron Technology |
(MT48LCxxMxxA2) SYNCHRONOUS DRAM |
|
| 9 | MT48LC1M16A1 |
Micron |
SYNCHRONOUS DRAM |
|
| 10 | MT48LC2M32B2 |
MICRON |
Synchronous DRAM |
|
| 11 | MT48LC2M8A |
MICRON |
SYNCHRONOUS DRAM |
|
| 12 | MT48LC32M16A2 |
Micron Technology |
(MT48LCxxMxxA2) SYNCHRONOUS DRAM |
|