MR36V01G52B - LAPIS

MR36V01G52B P2ROM

MR36V01G52B P2ROM64M–Word × 16–Bit or 128M–Word × 8–Bit Page Mode FEDR36V01G52B-002-01 Issue Date: Nov. 18, 2009 FEATURES 64Mx16 or 128Mx8-bit electrically switchable configuration · Page size of 8-word x 16-Bit or 16-word x 8-Bit · 3.0 V to 3.6V power supply ·Random Access time 110 ns MAX ·Page Access time 25 ns MAX · Operating current 50 mA MAX .

Features

64Mx16 or 128Mx8-bit electrically switchable configuration
· Page size of 8-word x 16-Bit or 16-word x 8-Bit
· 3.0 V to 3.6V power supply
·Random Access time 110 ns MAX
·Page Access time 25 ns MAX
· Operating current 50 mA MAX
· Standby current 25 mA MAX
· Input/Output TTL compatible
· Three-state output PACKAGES
·56-pin plastic TSOP (TSOP(1)56-P-1420-0.50-K-MC) P2ROM ADVANCED TECHNOLOGY P2ROM stands for Production Programmed ROM. This exclusive LAPIS Semiconductor technology utilizes factory test equipment for programming the customers code into the P2ROM prior to final product.