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Reset, Clocking, and Initialization Part II—e500 Core Complex and L2 Cache Core Complex Overview Core Register Summary L2 Look-Aside Cache/SRAM Part III—Memory, Security, and I/O Interfaces e500 Coherency Module DDR Memory Controller Programmable Interrupt Controller I2C Interface DUART Local Bus Controller Three-Speed Ethernet Controllers DMA Controller PC.
and Watchpoint Facility I 1 2 3 4 II 5 6 7 III 8 9 10 11 12 13 14 15 16 17 IV 18 19 20 DataSheet 4 U .com www.DataSheet4U.com I 1 2 3 4 II 5 6 7 III 8 9 10 11 12 13 14 15 16 17 IV 18 19 20 Part I—Overview Overview Memory Map Signal Descriptions Reset, Clocking, and Initialization Part II—e500 Core Complex and L2 Cache Core Complex Overview Core Register Summary L2 Look-Aside Cache/SRAM Part III—Memory, Security, and I/O Interfaces e500 Coherency Module DDR Memory Controller Programmable Interrupt Controller I2C Interface DUART Local Bus Controller Three-Speed Ethernet Controllers DMA Cont.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | MPC855 |
Motorola |
Family Hardware Specifications |
|
| 2 | MPC850 |
Sipex Corporation |
Connecting SP5301 to MPC850 PowerQUICC |
|
| 3 | MPC850 |
Motorola |
Communications Controller Hardware Specifications |
|
| 4 | MPC852T |
Motorola |
COMMUNICATIONS CONTROLLER |
|
| 5 | MPC8533E |
Freescale Semiconductor |
PowerQUICC III Integrated Processor |
|
| 6 | MPC8535E |
Freescale Semiconductor |
PowerQUICC III Integrated Processor |
|
| 7 | MPC8536E |
Freescale Semiconductor |
PowerQUICC III Integrated Processor |
|
| 8 | MPC853T |
Freescale Semiconductor |
PowerPC processor |
|
| 9 | MPC8540 |
Freescale Semiconductor |
Integrated Host Processor Reference Manual |
|
| 10 | MPC8541E |
Motorola Semiconductor |
(MPC8541E / MPC8555E) Microcontrollers |
|
| 11 | MPC8548E |
Freescale |
Integrated Processor |
|
| 12 | MPC8560 |
Freescale Semiconductor |
Integrated Processor Hardware Specifications |
|