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M54HC113 - ST Microelectronics

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M54HC113 DUAL J-K FLIP FLOP

The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This circuit offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inputs ar.

Features

he logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will function as shown in the truth table as long as minimum set-up times are observed. Input data is transferred to the outputs on the negative-going edge of the clock pulse. All inputs are equipped with protection circuits against static discharge and transient excess voltage. INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN CONNECTIONS (top view) NC = No Internal Connection October 1992 1/11 M54/M74HC113 TRUTH TABLE INPUTS PR L H H H H H X: Don’t Care OUTPUTS K X L H L H X CK X Q H Qn L .

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