L64724 - LSI Logic Corporation

L64724 Satellite Receiver

1.2 Typical Application 1.3 Features Summary L64724 Signal Definitions 2.1 Channel Interface 2.2 Channel Clock Interface 2.3 Phase-Locked Loop (PLL) Interface 2.4 Control Signals Interface 2.5 AGC/Clock Control Interface 2.6 Channel Data Output Interface 2.7 Analog-to-Digital Converter (ADC) Interface 2.8 Microcontroller Interfaceea L64724 Registers 3.1 L6472.

Features

Summary L64724 Signal Definitions 2.1 Channel Interface 2.2 Channel Clock Interface 2.3 Phase-Locked Loop (PLL) Interface 2.4 Control Signals Interface 2.5 AGC/Clock Control Interface 2.6 Channel Data Output Interface 2.7 Analog-to-Digital Converter (ADC) Interface 2.8 Microcontroller Interfaceea L64724 Registers 3.1 L64724 Register Overview 3.2 Reset and How it Affects Registers 3.3 Groups 0 and 1: Address Pointer Register 3.4 Group 2: System Mode and System Status Registers 3.5 Group 3: Status Registers 3.6 Group 4: Configuration Registers 3.7 Group 5: Self-Tuning Microcontroller Registers 3.8.