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The K4M51163LC is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 16 bits, fabricated with SAMSUNG's high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable bur.
• VDD/VDDQ = 2.5V/2.5V
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).
• EMRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system clock.
• Burst read single-bit write operation.
• Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh)
• DQM for masking.
• Auto refresh.
• 64ms refresh period (8K cycle).
• Commercial .
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | K4M51163LE |
Samsung semiconductor |
8M x 16Bit x 4 Banks Mobile SDRAM |
|
| 2 | K4M511633C |
Samsung semiconductor |
8M x 16Bit x 4 Banks Mobile SDRAM |
|
| 3 | K4M511633E |
Samsung |
8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
|
| 4 | K4M511633E-C |
Samsung |
8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
|
| 5 | K4M511633E-F1H |
Samsung |
8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
|
| 6 | K4M511633E-F1L |
Samsung |
8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
|
| 7 | K4M511633E-F75 |
Samsung |
8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
|
| 8 | K4M511633E-L |
Samsung |
8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
|
| 9 | K4M511633E-P |
Samsung |
8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
|
| 10 | K4M511633E-Y |
Samsung |
8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
|
| 11 | K4M51163PC-x |
Samsung semiconductor |
8M x 16Bit x 4 Banks Mobile SDRAM |
|
| 12 | K4M51163PI |
Samsung semiconductor |
512Mb I-die Mobile SDR SDRAM |
|