Recherchez avec le numéro de pièce ainsi que le fabricant ou la description
• 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single Read/Write control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control us- ing MODE input • Three chip enables for simple depth expansion and address pipelini.
DESCRIPTION
• 100 percent bus utilization
• No wait cycles between Read and Write
• Internal self-timed write cycle
• Individual Byte Write Control
• Single Read/Write control pin
• Clock controlled, registered address,
data and control
• Interleaved or linear burst sequence control us-
ing MODE input
• Three chip enables for simple depth expansion
and address pipelining
• Power Down mode
• Common data inputs and data outputs
• CKE pin to enable clock and suspend operation
• JEDEC 100-pin TQFP, 165-ball PBGA and 209-
ball (x72) PBGA packages
• Power supply:
NVF: Vdd 2.5V (± 5%), Vddq 2.5V (±.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | IS61NVF102436A |
ISSI |
36Mb STATE BUS SRAM |
|
| 2 | IS61NVF12836A |
ISSI |
(IS61NVFxxxxxA) STATE BUS SRAM |
|
| 3 | IS61NVF204818A |
ISSI |
36Mb STATE BUS SRAM |
|
| 4 | IS61NVF204836B |
Integrated Silicon Solution |
FLOW THROUGH (NO WAIT) STATE BUS SRAM |
|
| 5 | IS61NVF25618A |
ISSI |
(IS61NVFxxxxxA) STATE BUS SRAM |
|
| 6 | IS61NVF25636A |
ISSI |
(IS61NVFxxxxxA) STATE BUS SRAM |
|
| 7 | IS61NVF25672 |
ISSI |
STATE BUS SRAM |
|
| 8 | IS61NVF409618B |
Integrated Silicon Solution |
FLOW THROUGH (NO WAIT) STATE BUS SRAM |
|
| 9 | IS61NVF51218A |
ISSI |
(IS61NVFxxxxxA) STATE BUS SRAM |
|
| 10 | IS61NVF51236 |
Integrated Silicon Solution |
STATE BUS SRAM |
|
| 11 | IS61NVP10018 |
ISSI |
(IS61NVP10018 / IS61NVP51236) State Bus SRAM |
|
| 12 | IS61NVP102418 |
ISSI |
(IS61NVPxxxxx) STATE BUS SRAM |
|