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The IDT72V3654/72V3664/72V3674 are pin and functionally compatible versions of the IDT723654/723664/723674, designed to run off a 3.3V supply for exceptionally low-power consumption. These devices are monolithic, high-speed, low-power, CMOS bidirectional synchronous (clocked) FIFO memory which supports clock frequencies up to 100 MHz and has read access time.
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Memory storage capacity: IDT72V3654
– 2,048 x 36 x 2 IDT72V3664
– 4,096 x 36 x 2 IDT72V3674
– 8,192 x 36 x 2 Clock frequencies up to 100 MHz (6.5ns access time) Two independent clocked FIFOs buffering data in opposite directions Select IDT Standard timing (using EFA, EFB, FFA, and FFB flags functions) or First Word Fall Through Timing (using ORA, ORB, IRA, and IRB flag functions) Programmable Almost-Empty and Almost-Full flags; each has five default offsets (8, 16, 64, 256 and 1,024 ) Serial or parallel programming of partial flags Port B bus sizing of 36 bits (long word), 18 .
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | IDT72V3650 |
Integrated Device Tech |
CMOS FIFO memories |
|
| 2 | IDT72V3650 |
Renesas |
3.3V HIGH-DENSITY 36-BIT FIFO |
|
| 3 | IDT72V3651 |
Integrated Device Technology |
3.3 VOLT CMOS FIFO |
|
| 4 | IDT72V3652 |
IDT |
(IDT72V3652 - IDT72V3672) 3.3 VOLT CMOS SyncBiFIFO |
|
| 5 | IDT72V3653 |
IDT |
3.3 VOLT CMOS FIFO |
|
| 6 | IDT72V3656 |
Integrated Device Technology |
3.3 VOLT CMOS TRIPLE BUS FIFO |
|
| 7 | IDT72V3656 |
Renesas |
CMOS TRIPLE BUS SyncFIFO |
|
| 8 | IDT72V36100 |
Integrated Device Tech |
CMOS FIFO |
|
| 9 | IDT72V36100 |
Renesas |
3.3 VOLT HIGH-DENSITY SUPERSYNC FIFO |
|
| 10 | IDT72V36102 |
Integrated Device Technology |
3.3 VOLT CMOS SyncBiFIFO |
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| 11 | IDT72V36103 |
Integrated Device Technology |
3.3 VOLT CMOS SyncFIFO |
|
| 12 | IDT72V36104 |
Integrated Device Technology |
3.3 VOLT CMOS SyncBiFIFO |
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