HYB514171BJ-50 - Siemens

HYB514171BJ-50 256k x 16-Bit Dynamic RAM

50 ns 256k × 16 DRAM 60 ns 256k × 16 DRAM Pin Names A0 - A8 RAS UCAS, LCAS WE OE I/O1 - I/O16 Address Inputs Row Address Strobe Column Address Strobe Read/Write Input Output Enable Data Input/Output Power Supply (+ 5 V) Ground (0 V) No Connection VCC VSS N.C. Semiconductor Group 2 1998-10-01 HYB 514171BJ-50/-60 256k × 16 DRAM P-SOJ-40-1 V CC I/O1 I/O.

Features

include single + 5 V (± 10 %) power supply, direct interfacing with high performance logic device families such as Schottky TTL. Semiconductor Group 1 1998-10-01 HYB 514171BJ-50/-60 256k × 16 DRAM Ordering Information Type HYB 514171BJ-50 HYB 514171BJ-60 Truth Table RAS H L L L L L L L L LCAS H H L H L L H L L UCAS H H H L L H L L L WE H H H H H L L L H OE H H L L L H H H H I/O1 - I/O8 High-Z High-Z Dout High-Z Dout Din Don't care Din High-Z I/O9 - I/O16 High-Z High-Z High-Z Dout Dout Don't care Din Din High-Z Operation Standby Refresh Lower byte read Upper byte read Word read Lower byte .