HY27SS16561M - Hynix Semiconductor

HY27SS16561M (HY27xSxx561M) 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash

of Device Operations - /CE Don’t Care Enabled(Disabled) -> Sequential Row Read Disabled(Enabled) (Page23) 1) change FBGA dimension : Thickness : 1.2mm(max) -> 1.0mm(max) 2) Edit Fig.33 read operation with CE don't care 1) Change TSOP1,WSOP1,FBGA package dimension 0.6 - Change TSOP1,WSOP1,FBGA mechanical data - Inches parameter has been excluded from the mech.

Features

SUMMARY HIGH DENSITY NAND FLASH MEMORIES - Cost effective solutions for mass storage applications FAST BLOCK ERASE - Block erase time: 2ms (Typ) NAND INTERFACE - x8 or x16 bus width. - Multiplexed Address/ Data www.DataSheet4U.com - Pinout compatibility for all densities STATUS REGISTER ELECTRONIC SIGNATURE SUPPLY VOLTAGE CHIP ENABLE DON'T CARE OPTION - Simple interface with microcontroller - 3.3V device: VCC = 2.7 to 3.6V : HY27USXX561M - 1.8V device: VCC = 1.7 to 1.95V : HY27SSXX561M AUTOMATIC PAGE 0 READ AT POWER-UP OPTION - Boot from NAND support - Automatic Memory Download Memory.