HSP50016 - Intersil Corporation

HSP50016 Digital Down Converter

NAME VCC GND DATA0-15 CLK RESET TYPE I I I +5V Power. Ground. Input Data Bus. Selectable between two's complement and offset binary. DATA0 is the LSB. Clock for input data bus. fS is the frequency of CLK, which is also the input sample rate. RESET initializes the internal state of the DDC. During RESET, all internal processing stops. RESET facilitates the sy.

Features

• 75 MSPS Input Data Rate
• 16-Bit Data Input; Offset Binary or 2’s Complement Format
• Spurious Free Dynamic Range Through Modulator >102dB
• Frequency Selectivity: <0.006Hz
• Identical Lowpass Filters for I and Q
• Passband Ripple: <0.04dB
• Stopband Attenuation: >104dB
• Filter -3dB to -102dB Shape Factor: <1.5
• Decimation Factors from 32 to 131,072
• IEEE 1149.1 Test Access Port
• HSP50016-EV Evaluation Board Available Applications
• Cellular Base Stations
• Smart Antennas
• Channelized Receivers
• Spectrum Analysis
• Related Products: HI5703, HI5746, HI5766 A/Ds Ordering Information PA.