The HEF4720B and HEF4720V are 256-bit, 1-bit per word random access memories with 3-state outputs. The memories are fully decoded and completely static. Recommended supply voltage range for HEF4720B is 3 to 15 V and for HEF4720V is 4,5 to 12,5 V; minimum stand-by voltage for both types is 3 V. The use of LOCMOS gives the added advantage of very low stand-by .
power supply. The separate chip select input (CS) allows simple memory expansion when the outputs are wire-O Red. If CS is HIGH, the outputs are floating and no new information can be written into the memory. The signal at O has the same polarity as the data input D, while the signal at O is the complement of the signal at O. The write control W must be HIGH for writing into the memory. Fig.1 Functional diagram. HEF4720BP; HEF4720VP(N): 16-lead DIL; plastic (SOT38-1) HEF4720BD; HEF4720VD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4720BT; HEF4720VT(D): 16-lead SO; plastic (SOT109-1) ( ): P.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HEF4720B |
NXP |
256-bit/ 1-bit per word random access memories | |
2 | HEF4724B |
NXP |
8-bit addressable latch | |
3 | HEF4731B |
NXP |
Quadruple 64-bit static shift register | |
4 | HEF4731V |
NXP |
Quadruple 64-bit static shift register | |
5 | HEF4737B |
NXP |
Quadruple static decade counters | |
6 | HEF4737V |
NXP |
Quadruple static decade counters | |
7 | HEF4738V |
NXP |
IEC/IEEE bus interface | |
8 | HEF4750V |
NXP |
Frequency synthesizer | |
9 | HEF4751V |
NXP |
Universal divider | |
10 | HEF4752V |
NXP |
A.C. motor control circuit | |
11 | HEF4753B |
NXP |
Universal timer module | |
12 | HEF4754V |
NXP |
18-element bar graph LCD driver |