HD74LV393A - Hitachi Semiconductor

HD74LV393A Dual 4-bit Binary Counters

The HD74LV393A contain two 4-bit ripple carry binary counters, which can be cascaded to create a single divide-by-256 counter. The HD74LV393A is incremented on the high to low transition (negative edge) of the clock input, and each has an independent clear input. When clear is set high all four bits of each counter are set to a low level. This enables count .

Features

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• VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C) Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V) HD74LV393A Function Table Inputs CLK X H L ↑ ↓ Note: H: L: X: ↑: ↓: High level Low level Immaterial Low to high transition High to low transition CLR H L L L L Output L No change No change No change Count up Pin Arrangement 1CLK 1 1CLR 2 1QA 3 1QB 4 1QC 5 1QD 6 GND.