The HD74HC679 address comparator simplifies addressing of memory boards and/or other peripheral devices. The four P inputs are normally hard wired with a preprogrammed address. An internal decoder determines what input information applied to the 12 A inputs must be low or high to cause a low state at the output (Y). For example, a positive-logic bit combinat.
and enable input (G). When G is low, the device is enabled. When G is high, the device is disabled and the output is high regardless of the A and P inputs.
Features
• High Speed Operation: tpd (A to Y) = 18 ns typ (CL = 50 p.
The HD74HC679 address comparator simplifies addressing of memory boards and/or other peripheral devices. The four P inpu.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HD74HC670 |
Hitachi Semiconductor |
4-by-4 Register | |
2 | HD74HC670 |
Renesas |
4-by-4 Register File | |
3 | HD74HC673 |
Hitachi Semiconductor |
16-bit Shift Register | |
4 | HD74HC674 |
Hitachi Semiconductor |
16-bit Shift Register | |
5 | HD74HC677 |
Hitachi Semiconductor |
16-bit Address Comparator | |
6 | HD74HC678 |
Hitachi Semiconductor |
16-bit Address Comparator | |
7 | HD74HC620 |
Hitachi Semiconductor |
Octal Bus Transceivers | |
8 | HD74HC620 |
Renesas |
Octal Bus Transceivers | |
9 | HD74HC623 |
Hitachi Semiconductor |
Octal Bus Transceivers | |
10 | HD74HC623 |
Renesas |
Octal Bus Transceivers | |
11 | HD74HC640 |
Hitachi Semiconductor |
Octal Bus Transceivers | |
12 | HD74HC640 |
Renesas |
Octal Bus Transceivers |