The HD74HC678 address comparator simplifies addressing of memory boards and/or other peripheral devices. The four P inputs are normally hard wired with a preprogrammed address. An internal decoder determines what input information applied to the 16 A inputs must be low or high to cause a low state at the output (Y). For example, a positive-logic bit combinat.
a transparent latch and a latch enabled input (C). When C is high, the device is in the transparent mode. When C is low, the previous logic state of Y is latched.
Features
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• High Speed Operation High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
HD74HC678
Function Table
Inputs C H H H H H H H H H H H H H H H H H L P3 P2 P1 P0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 Output Y L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HD74HC670 |
Hitachi Semiconductor |
4-by-4 Register | |
2 | HD74HC670 |
Renesas |
4-by-4 Register File | |
3 | HD74HC673 |
Hitachi Semiconductor |
16-bit Shift Register | |
4 | HD74HC674 |
Hitachi Semiconductor |
16-bit Shift Register | |
5 | HD74HC677 |
Hitachi Semiconductor |
16-bit Address Comparator | |
6 | HD74HC679 |
Hitachi Semiconductor |
12-bit Address Comparator | |
7 | HD74HC679 |
Renesas |
12-bit Address Comparator | |
8 | HD74HC620 |
Hitachi Semiconductor |
Octal Bus Transceivers | |
9 | HD74HC620 |
Renesas |
Octal Bus Transceivers | |
10 | HD74HC623 |
Hitachi Semiconductor |
Octal Bus Transceivers | |
11 | HD74HC623 |
Renesas |
Octal Bus Transceivers | |
12 | HD74HC640 |
Hitachi Semiconductor |
Octal Bus Transceivers |