The HD74HC237 decodes a three-bit Address to one-of-eight active-high outputs. The device has a transparent latch for storage of the Address. Two Chip Selects, one active-low and one active-high, are provided to facilitate the demultiplexing, cascading, and chip-selecting functions. The demultiplexing function is accomplished by using the Address inputs to s.
• High Speed Operation: tpd (Data to Y) = 19 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
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The HD74HC237 decodes a three-bit Address to one-of-eight active-high outputs. The device has a transparent latch for st.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HD74HC238 |
Hitachi Semiconductor |
3-to-8-line Decoder/Demultiplexer | |
2 | HD74HC238 |
Renesas |
3-to-8-line Decoder/Demultiplexer | |
3 | HD74HC20 |
Hitachi Semiconductor |
Dual 4-input NAND Gates | |
4 | HD74HC20 |
Renesas |
Dual 4-input NAND Gates | |
5 | HD74HC21 |
Hitachi Semiconductor |
Dual 4-input AND Gates | |
6 | HD74HC21 |
Renesas |
Dual 4-input AND Gates | |
7 | HD74HC221 |
Hitachi Semiconductor |
Dual Monostable Multivibrators (with Schmitt Trigger Input) | |
8 | HD74HC221 |
Renesas |
Dual Monostable Multivibrators | |
9 | HD74HC240 |
Hitachi Semiconductor |
Octal Buffers/Line Drivers/Line Receivers(with inverted 3-state outputs) | |
10 | HD74HC240 |
Renesas |
Octal Buffers/Line Drivers/Line Receivers | |
11 | HD74HC241 |
Hitachi Semiconductor |
Octal Buffers/Line Drivers/Line Receivers(with noninverted 3-state outputs) | |
12 | HD74HC241 |
Renesas |
Octal Buffers/Line Drivers/Line Receivers |