HD74HC240 - Renesas

HD74HC240 Octal Buffers/Line Drivers/Line Receivers

The HD74HC240 is an inverting buffer and has two active low enables (1G and 2G). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs. Features • High Speed Operation: tpd = 10 ns typ (CL = 50 pF) • High Output Current: Fanout of 15 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max.

Features

• High Speed Operation: tpd = 10 ns typ (CL = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
• Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74HC240P DILP-20 pin PRDP0020AC-B (DP-20NEV) P HD74HC240FPEL SOP-20 pin (JEITA) PRSP0020DD-B (FP-20DAV) FP HD74HC240RPEL SOP-20 pin (JEDEC) PRSP0020DC-A RP (FP-20DBV) HD74HC240TELL TSSOP-20 pin PTSP0020JB-A (TTP-20DAV) T Note: Please consult.