HD74AC539 - Hitachi Semiconductor

HD74AC539 Dual 1-of-4 Decoder with 3-State Output

The HD74AC539 contains two inpedendent decoders. Each accepts two Address (A 0, A1) input signals and decodes them to select one of four mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active HIGH (P = L) or active LOW (P = H). An active LOW input Enable (E) is available for data demultiplexing; data is routed to t.

Features

, OEb P a, P b O0a to O3a O0b to O3b Side A Address Inputs Side B Address Inputs Enable Inputs (Active LOW) Output Enable Inputs (Active LOW) Polarity Control Inputs Side A 3-State Outputs Side B 3-State Outputs Truth Table Inputs Function High impedance Disable Active HIGH output (P = L) OE H L L L L L Active LOW output (P = H) L L L L H L X Z : : : : High Voltage Level Low Voltage Level Immaterial High Impedance E X H L L L L L L L L A1 X X L L H H L L H H A0 X X L H L H L H L H Outputs O0 Z On = P H L L L L H H H L H L L H L H H L L H L H H L H L L L H H H H L O1 Z O2 Z O3 Z 3 HD74AC539 .