The Intersil HCS166MS is an 8-bit shift register that has fully synchronous serial or parallel data entry selected by an active LOW Parallel Enable (PE) input. When the PE is LOW one setup time before the LOW-to-HIGH clock transition, parallel data is entered into the register. When PE is HIGH, data is entered into internal bit position Q0 from Serial Data I.
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD s(Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range) - Standard Outputs - 10 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels - VIL = 0.3 VCC Max - VIH = 0.7 VCC Min
• Input Curren.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HCS160MS |
Intersil |
Radiation Hardened BCD Decade Synchronous Counter | |
2 | HCS161MS |
Intersil |
Radiation Hardened Synchronous Counter | |
3 | HCS163MS |
Intersil |
Radiation Hardened Synchronous Presettable Counter | |
4 | HCS164MS |
Intersil |
Radiation Hardened 8-Bit Serial-In/Parallel-Out Register | |
5 | HCS165MS |
Intersil |
Radiation Hardened Inverting 8-Bit Parallel-Input/Serial Output Shift Register | |
6 | HCS101 |
Microchip |
Fixed Code Encoder | |
7 | HCS109MS |
Intersil |
Radiation Hardened Dual JK Flip Flop | |
8 | HCS10MS |
Intersil |
Radiation Hardened Triple 3-Input NAND Gate | |
9 | HCS112MS |
Intersil Corporation |
Radiation Hardened Dual JK Flip-Flop | |
10 | HCS11MS |
Intersil |
Radiation Hardened Triple 3-Input AND Gate | |
11 | HCS12 |
Motorola Inc |
USB2.0 to ATA/ATAPI Bridge | |
12 | HCS1206 |
HITANO |
METAL STRIP CURRENT SENSING RESISTORS |