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Symbol Type Description CLK 4M x 32 LPSDRAM EM6A9325 Table 1. Pin Details of 4Mx32 LPSDRAM Input Clock: CLK is driven by the system clock. All SDRAM input signals are sampled on the positive edge of CLK. CLK also increments the internal burst counter and controls the output registers. Input Clock Enable: CKE activates(HIGH) and deactivates(LOW) the CLK .
Clock rate: 133/125/100 MHz Fully synchronous operation Internal pipelined architecture Four internal banks (1M x 32bit x 4bank) Programmable Mode - CAS# Latency: 1, 2 & 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: Sequential & Interleave - Burst-Read-Single-Write
• Burst stop function
• Individual byte controlled by DQM0-3
• Auto Refresh and Self Refresh
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EM6A9325
Preliminary (Rev 0.4 June/2003)
• 4096 refresh cycles/64ms
• Single 2.5V power supply
• Interface: LVCMOS
•Package : 90 ball-FBGA, 11x13mm, Lead Free
4M x 32 Low Power SDRAM (LPSDRAM)
Ordering Information
Par.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | EM6A9320 |
Etron Technology Inc. |
4M x 32 DDR SDRAM |
|
| 2 | EM6A9320BIB |
Etron Technology |
4M x 32 bit DDR Synchronous DRAM |
|
| 3 | EM6A9160 |
Etron Technology |
8M x 16 DDR Synchronous DRAM |
|
| 4 | EM6A8160 |
Etron Technology |
4M x 16 DDR Synchronous DRAM |
|
| 5 | EM6A8160TSA |
Etron Technology |
4M x 16 DDR Synchronous DRAM |
|
| 6 | EM6AA160 |
Etron Technology |
16M x 16 bit DDR Synchronous DRAM |
|
| 7 | EM6AA320 |
Etron Technology |
8M x 32 DDR SDRAM |
|
| 8 | EM6AB080 |
Etron Technology |
64M x 8 bit DDR Synchronous DRAM |
|
| 9 | EM6AB160 |
Etron Technology |
32M x 16 bit DDR Synchronous DRAM |
|
| 10 | EM6AB160TSA |
Etron Technology |
32M x 16 bit DDR Synchronous DRAM |
|
| 11 | EM60000 |
ELAN Microelectronics Corp |
Stereo Four Channels 8-Bit Based Sound Processor |
|
| 12 | EM60001 |
ELAN Microelectronics |
Stereo Four Channels 8-Bit Based Sound Processor |
|