EM66932A - Etron Technology

EM66932A 4M x 32 Hand-Held Low Power SDRAM

Symbol Type Description CLK 4M x 32 HH LPSDRAM EM66932A Table 1. Pin Details of 4Mx32 HH LPSDRAM Input Clock: CLK is driven by the system clock. All SDRAM input signals are sampled on the positive edge of CLK. CLK also increments the internal burst counter and controls the output registers. Input Clock Enable: CKE activates(HIGH) and deactivates(LOW) th.

Features

Clock rate: 133/125/100 MHz Fully synchronous operation Internal pipelined architecture Four internal banks (1M x 32bit x 4bank) Programmable Mode - CAS# Latency: 1, 2 & 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: Sequential & Interleave - Burst-Read-Single-Write - Driving Strenght : Full & Half - PASR (Partial Array Self Refresh) - TCSR (Temperature Compensated Self Refresh)
• Burst stop function
• Individual byte controlled by DQM0-3
• Auto Refresh and Self Refresh
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• EM66932A Preliminary (Rev 0.1 June/2003)
• 4096 refresh cycles/64ms
• Single 3.0V, or 3.3V power supply .