The CY7C109B / CY7C1009B is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE1), an active HIGH Chip Enable (CE2), an active LOW Out- Logic Block Diagram Pin Configurations SOJ Top View NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND A11 A9 A8 A13 WE CE2 A15.
• High speed — tAA = 12 ns
• Low active power — 495 mW (max. 12 ns)
• Low CMOS standby power — 55 mW (max.) 4 mW
• 2.0V Data Retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE1, CE2, and OE options put Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable One (CE1) and Write Enable (WE) inputs LOW and Chip Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16). Reading from the device .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | CY7C1009 |
Cypress Semiconductor |
Straight 1-Row BergStik II Headers | |
2 | CY7C1009D |
Cypress Semiconductor |
1-Mbit (128 K x 8) Static RAM | |
3 | CY7C1009V33 |
Cypress Semiconductor |
Straight 1-Row BergStik II Headers | |
4 | CY7C1006B |
Cypress Semiconductor |
256K x 4 Static RAM | |
5 | CY7C1006D |
Cypress |
1-Mbit (256K x 4) Static RAM | |
6 | CY7C1007 |
Cypress Semiconductor |
(CY7C107 / CY7C1007) 1M x 1 Static RAM | |
7 | CY7C1007D |
Cypress Semiconductor |
1-Mbit (1 M x 1) Static RAM | |
8 | CY7C1010DV33 |
Cypress Semiconductor |
2-Mbit (256 K x 8) Static RAM | |
9 | CY7C1011BV33 |
Cypress Semiconductor |
128K x 16 Static RAM | |
10 | CY7C1011CV33 |
Cypress Semiconductor |
128K x 16 Static RAM | |
11 | CY7C1011DV33 |
Cypress Semiconductor |
2-Mbit (128K x 16)Static RAM | |
12 | CY7C1011G |
Cypress |
2-Mbit (128K words x 16 bit) Static RAM |