The CY7C107 and CY7C1007 are high-performance CMOS static RAMs organized as 1,048,576 words by 1 bit. Easy Logic Block Diagram DIN Pin Configuration SOJ Top View A10 A11 A12 A13 A14 A15 NC A16 A17 A18 A19 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 INPUT BUFFER A0 A1 A2 A3 A4 A5 A6 A7 A8 ROW DECODER 512x2048 ARRA Y DOUT D.
• High speed — tAA = 12 ns
• CMOS for optimum speed/power
• Low active power — 825 mW
• Low standby power — 275 mW
• 2.0V data retention (optional) — 100 µW
• Automatic power-down when deselected
• TTL-compatible inputs and outputs memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers. These devices have an automatic power-down feature that reduces power consumption by more than 65% when deselected. Writing to the devices is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the input pin (DIN) is written into the memory location .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | CY7C1006B |
Cypress Semiconductor |
256K x 4 Static RAM | |
2 | CY7C1006D |
Cypress |
1-Mbit (256K x 4) Static RAM | |
3 | CY7C1007D |
Cypress Semiconductor |
1-Mbit (1 M x 1) Static RAM | |
4 | CY7C1009 |
Cypress Semiconductor |
Straight 1-Row BergStik II Headers | |
5 | CY7C1009B |
Cypress Semiconductor |
128K x 8 Static RAM | |
6 | CY7C1009D |
Cypress Semiconductor |
1-Mbit (128 K x 8) Static RAM | |
7 | CY7C1009V33 |
Cypress Semiconductor |
Straight 1-Row BergStik II Headers | |
8 | CY7C1010DV33 |
Cypress Semiconductor |
2-Mbit (256 K x 8) Static RAM | |
9 | CY7C1011BV33 |
Cypress Semiconductor |
128K x 16 Static RAM | |
10 | CY7C1011CV33 |
Cypress Semiconductor |
128K x 16 Static RAM | |
11 | CY7C1011DV33 |
Cypress Semiconductor |
2-Mbit (128K x 16)Static RAM | |
12 | CY7C1011G |
Cypress |
2-Mbit (128K words x 16 bit) Static RAM |