Pin 6 7 39,40,43,44 16,17,20,23 14 [2] Name XIN XOUT CPU (0:1)T, CPU (0:1)C PCI (0:5) FS3/PCI_F0 PWR I/O I Description Oscillator buffer input. Connect to a crystal or to an external clock. Oscillator buffer output. Connect to a crystal. Do not connect when an external clock is applied at XIN. Differential host output clock pairs. See Table 1 for frequen.
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• Supports Pentium 4-type CPUs 3.3V power supply Eight copies of PCI clocks One 4-MHz USB clock Two copies of ZCLK clocks One 48-MHz/24-MHz programmable SIO clock Two differential CPU clock pairs
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• SMBus support with read-back capabilities Spread Spectrum EMI reduction Dial-a-Frequency® features Dial-a-Ratio™ features Dial-a-dB® features 48-pin SSOP and TSSOP packages Watchdog Function
Block Diagram
XIN XOUT PLL1 CPU_STP# IREF FS(0:4) MULT0 VTTPWRGD PCI_STP# PLL2 Power on Latch
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Pin Configuration[1]
REF(0:2)
CPU(0:1)T CPU(0:1)C SDCLK AGP(0:1) ZCLK(0:1) PCI(0:5) PC.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | CY28341 |
Cypress Semiconductor |
Universal Single-Chip Clock Solution | |
2 | CY28341 |
SpectraLinear |
Universal Single-Chip Clock Solution | |
3 | CY28343 |
Cypress Semiconductor |
Zero Delay SDR/DDR Clock Buffer | |
4 | CY28344 |
Cypress Semiconductor |
FTG | |
5 | CY28346 |
Cypress Semiconductor |
Clock Synthesizer with Differential CPU Outputs | |
6 | CY28346-2 |
Silicon Laboratories |
Clock Synthesizer | |
7 | CY28347 |
Cypress Semiconductor |
Universal Single-chip Clock Solution | |
8 | CY28349 |
SpectraLinear |
FTG | |
9 | CY28349B |
Cypress Semiconductor |
FTG | |
10 | CY28301 |
Cypress Semiconductor |
Frequency Generator for Intel Integrated Chipset | |
11 | CY28322-2 |
Cypress |
133 Mhz Spread Spectrum Clock Synthesizer with Differential CPU Outputs | |
12 | CY28323 |
Cypress Semiconductor |
FTG |