CY28341 Universal Single-Chip Clock Solution Datasheet

CY28341 Universal Single-Chip Clock Solution

2] Pin 3 4 1 XIN XOUT FS0/REF0 VDD VDD Name PWR I/O I O Description Oscillator Buffer Input. Connect to a crystal or to an external clock. Oscillator Buffer Output. Connect to a crystal. Do not connect when an external clock is applied at XIN. I/O Power-on Bidirectional Input/Output. At power-up, FS0 is the input. When PU the power supply voltage crosses th.

Features

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• Supports VIA P4M266/KM266 chipsets Supports Pentium® 4, Athlon™ processors Supports two DDR DIMMS Supports three SDRAMS DIMMS at 100 MHz Provides: — Two different programmable CPU clock pairs — Six differential SDRAM DDR pairs — Three low-skew/low-jitter AGP clocks — Seven low-skew/low-jitter PCI clocks — One 48M output for USB — One programmable 24M or 48M for SIO
• Dial-a-Frequency™ and Dial-a-dB features
• Spread Spectrum for best electromagnetic interference (EMI) reduction
• Watchdog feature for systems recovery
• SMBus-compatible for programmability
• 56-pin SSOP and TSSOP pa.

The same part from a different manufacturer

CY28341 - SpectraLinear

2] Pin 3 4 1 XIN XOUT FS0/REF0 VDD VDD Name PWR I/O I O Description Oscillator Buffer Input. Connect to a crystal or to .

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CY28341 - Cypress Semiconductor