• Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • TTAyp=ic2a5lofCMAX = 54MHz at VCC = 5V, CL = 15pF, • Fanout (Over Temperature Range) - Standard Outputs . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC The ’HC109 and ’HCT109 are du.
Description
• Asynchronous Set and Reset
• Schmitt Trigger Clock Inputs
• TTAyp=ic2a5lofCMAX = 54MHz at VCC = 5V, CL = 15pF,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
The ’HC109 and ’HCT109 are dual J-K flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock (1CP and 2CP).
The flip-flop is set and reset by active-low S and R, respectively. A low on both the set and reset inputs simulta.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | CD54HCT10 |
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Triple 3-Input NAND Gates | |
2 | CD54HCT10F |
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Triple 3-Input NAND Gates | |
3 | CD54HCT11 |
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High-Speed CMOS Logic Triple 3-Input AND Gate | |
4 | CD54HCT112 |
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Dual J-K Flip-Flop | |
5 | CD54HCT123 |
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High-Speed CMOS Logic Dual Retriggerable Monostable Multivibrators | |
6 | CD54HCT125 |
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High-Speed CMOS Logic Quad Buffer | |
7 | CD54HCT126 |
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High-Speed CMOS Logic | |
8 | CD54HCT132 |
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Quadruple 2-Input NAND Gates | |
9 | CD54HCT132J |
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Quadruple 2-Input NAND Gates | |
10 | CD54HCT138 |
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High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer Inverting/Noninverting | |
11 | CD54HCT138F |
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High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer Inverting/Noninverting | |
12 | CD54HCT139 |
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Dual 2- to 4-Line Decoder/Demultiplexer |