ordering information The ’ACT112 devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup-time requirements is transferred to the out.
of the clock pulse (CLK). Clock triggering occurs at a voltage level and is not directly related to the fall time of the clock pulse. Following the hold-time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by tying J and K high.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE PART NUMBER
TOP-SIDE MARKING
SOIC
– M
–55°C to 125°C
Tube
CD74ACT112M
Tape and reel CD74ACT112M96
ACT112M
CDIP
– F
Tube
CD54ACT112F3A
CD54ACT112F3A
† Package drawings, standard packing quantities, therma.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | CD54ACT109 |
Texas Instruments |
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS | |
2 | CD54ACT138 |
Texas Instruments |
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS | |
3 | CD54ACT139 |
Texas Instruments |
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS | |
4 | CD54ACT151 |
Texas Instruments |
8-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS | |
5 | CD54ACT153 |
Texas Instruments |
DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS | |
6 | CD54ACT161 |
Texas Instruments |
4-BIT SYNCHRONOUS BINARY COUNTERS | |
7 | CD54ACT163 |
Texas Instruments |
4-BIT SYNCHRONOUS BINARY COUNTERS | |
8 | CD54ACT164 |
Texas Instruments |
8-Bit Serial-In/Parallel-Out Shift Register | |
9 | CD54ACT174 |
Texas Instruments |
HEX D-TYPE FLIP-FLOPS | |
10 | CD54ACT191 |
Texas Instruments |
Presettable Synchronous 4-Bit Binary Up/Down Counter | |
11 | CD54ACT00 |
Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NAND GATES | |
12 | CD54ACT00F3A |
Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NAND GATES |