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The AS6C62256A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6- transistor cell. The circuit is activated by the falling edge of E. The address and control inputs open simultaneously. According to the information of W and G,.
32768x8 bit static CMOS RAM
Access times 70 ns
Common data inputs and data
outputs
Three-state outputs
Typ. operating supply current
o 70 ns: 50 mA
TTL/CMOS-compatible
Automatical reduction of power
dissipation in long Read Cycles
Power supply voltage 5V + 10%
Operating temperature ranges
o 0 to 70 °C o -40 to 85 °C
QS 9000 Quality Standard
ESD protection > 2000 V (MIL STD 883C M3015.7)
Latch-up immunity >100 mA
Packages: PDIP28 (600 mil)
SOP28 (330 mil)
DESCRIPTION
The AS6C62256A is a static RAM
manufactured using a CMOS
process technology with the
following o.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | AS6C62256 |
Alliance Semiconductor |
32K X 8 BIT LOW POWER CMOS SRAM |
|
| 2 | AS6C6264 |
Alliance Semiconductor |
8K X 8 BIT LOW POWER CMOS SRAM |
|
| 3 | AS6C6264A |
Alliance Semiconductor |
8K x 8 BIT LOW POWER CMOS SRAM |
|
| 4 | AS6C6416-55BIN |
Alliance Semiconductor |
4M x 16 bit Low Power CMOS SRAM |
|
| 5 | AS6C1008 |
Alliance Semiconductor |
128K X 8 BIT LOW POWER CMOS SRAM |
|
| 6 | AS6C1008L |
Alliance Semiconductor |
128k x 8 BIT SUPER LOW POWER CMOS SRAM |
|
| 7 | AS6C1016 |
Alliance Semiconductor |
64K X 16 BIT LOW POWER CMOS SRAM |
|
| 8 | AS6C1616 |
Alliance Semiconductor |
1024K X 16 BIT LOW POWER CMOS SRAM |
|
| 9 | AS6C1616A |
Alliance Semiconductor |
1024K X 16 BIT LOW POWER CMOS SRAM |
|
| 10 | AS6C2008 |
Alliance Semiconductor |
256K X 8 BIT LOW POWER CMOS SRAM |
|
| 11 | AS6C2008A |
Alliance Semiconductor |
256K X 8 BIT LOW POWER CMOS SRAM |
|
| 12 | AS6C2016 |
Alliance Semiconductor |
128K X 16 BIT LOW POWER CMOS SRAM |
|