AN209 - ALTERA

AN209 Using Terminator Technology in Stratix & Stratix GX Devices

Using Terminator Technology in Stratix & Stratix GX Devices November 2002, ver. 2.0 Application Note 209 Introduction Signal integrity is crucial in high-speed digital designs because of increased system speeds and clock edge rates. Designers must properly terminate single-ended and differential signals to achieve signal integrity. Traditionally, designers.

Features

are not available. Figure 2 shows the on-chip impedance matching resistor for an output driver. Figure 2. Driver Impedance Matching Impedance Matched Driver (LVTTL, LVCMOS) VCCIO = 1.8, 2.5, or 3.3 V Rs Z0 Receiving Buffer (LVTTL, LVCMOS) Parallel Termination (RT) Terminator technology supports on-chip parallel termination for several voltage-referenced I/O standards. To maintain signal integrity and save board space, use Terminator technology resistors instead of external pullup termination resistors. Parallel termination is supported for SSTL-2, SSTL-3, HSTL (class I and II), GTL, GTL+, a.