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AN2011S Correlated Double Sampling IC s Overview The AN2011S is an integrated circuit that outputs video-signal made from output-signal of CCD imageelement by correlated double sampling. 0.4 1 2 0.4±0.25 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1.5±0.2 8 9 Unit:mm s Features • Available for CCD of up to 768H by using the highspeed sampling circuit • The sampling.
• Available for CCD of up to 768H by using the highspeed sampling circuit
• The sampling pulse corresponds to CMOS level.
• The gain is fixed to 6dB.
• Compatible with the AN2010S
0.1±0.1
1.27
4.2±0.3 6.5±0.3
16-Pin PANAFLAT package (SOP016-P-0225)
s Block Diagram
VCC1
16 14 13
2
Limiter
Sample Hold
Sample Hold
+
Sub & GC Amp. 12
10
Sample Hold
–
0.15 0.65
0.3
15
VCC2
11
5
6
7
4
1
3
GND3
GND1
GND2
10.1±0.3
.
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