ADGS1212 - Analog Devices

ADGS1212 Mux Configurable

Data Sheet SPI Interface, Quad SPST Switch, Low QINJ, Low CON, ±15 V/+12 V, Mux Configurable ADGS1212 FEATURES SPI interface with error detection Includes CRC, invalid read/write address, and SCLK count error detection Supports burst mode and daisy-chain mode Industry-standard SPI Mode 0 and SPI Mode 3 compatible Guaranteed break-before-make switching allo.

Features

SPI interface with error detection Includes CRC, invalid read/write address, and SCLK count error detection Supports burst mode and daisy-chain mode Industry-standard SPI Mode 0 and SPI Mode 3 compatible Guaranteed break-before-make switching allowing external wiring of switches to deliver multiplexer configurations VSS to VDD analog signal range Fully specified at ±15 V and +12 V supply ±4.5 V to ±16.5 V dual-supply operation 5 V to 16.5 V single-supply operation Ultralow capacitance and leakage allows fast settling time 1 pF typical off switch drain capacitance at 25°C, ±15 V 2.6 pF typical .